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Embedded Instrumentation

Testonica delivers technology for Marginal Defect detection on DDR3/4 bus

Testonica delivers technology for Marginal Defect detection on DDR3/4 bus

Marginal Defects, such as excessive voids in solder joints, dewetting, head-in-pillow and alike do not necessarily cause malfunctions, but may result in system performance issues, increased error rates, intermittent faults and other sporadic stability issues observed in certain operation modes, at certain workloads or manifesting in a seemingly stochastic manner. As a result, Marginal Defects may lead to No Fault/Trouble Found (NFF/NTF) scenarios.

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IEEE I&M Magazine published our technical paper

IEEE I&M Magazine published our technical paper

In its Aug-Sept issue, IEEE Instrumentation & Measurement Magazine published our technical paper that was originally presented last year at AUTOTESTCON conference in Anaheim, CA. It is one of six conference papers selected for the journal on a quality basis out of the total of 80 AUTOTESTCON'2016 contributions.

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Chairing TESTA workshop in Cyprus

Chairing TESTA workshop in Cyprus

Testonica's director Dr. Artur Jutman serves this year as the General Chair of the 2nd International Test Standards Application Workshop (TESTA'2017). The TESTA workshop is a focused, open discussion platform dedicated to exchange of fresh ideas, industrial best practices, methodologies and work‐in‐progress around test related standards, especially those being actively developed today or the ones recently released.

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Testonica delivers embedded Bit-Error Rate Test (BERT) technology

Testonica delivers embedded Bit-Error Rate Test (BERT) technology

The delivered solution enables quality evaluation of up to 10Gbit serial buses (PCIe Gen1/2/3, SATA, optical fiber channel, etc) with a help of powerful FPGA-embedded instrumentation technology. The technology is capable to measure Bit-Error Rate (BER) characteristic for high-speed digital data transmission links as well as to plot so-called BER eye diagram. The latter feature directly fits for mass-production testing since allows every manufactured product to be quickly checked for potential problems on high-speed channels.

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Testonica coordinates just launched FP7 project BASTION

Testonica coordinates just launched FP7 project BASTION

Today, an average family spends over 50 Euros of hidden costs annually on No-Failure-Found (NFF) investigations - a known problem of an unknown origin. Tomorrow, the electronic engine control system in a car will be dying after three-five years of operation due to CMOS aging. Actions are urgently needed!

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Clock frequency measurement using embedded instruments

Clock frequency measurement using embedded instruments

Testonica Lab has released universal virtual embedded instrument IP capable to measure frequencies of high-speed clock signals connected to FPGA device. The developed technology offers an easy way of checking frequencies of on-board oscillators without the need of using any kind of external test and measurement equipment. The method does not involve usage of external nail probes or any other means of physical access to oscillator’s pin.

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