Meet Testonica in Vilnius at the Baltic PCB & Systems Conference on December 12th!

🤝 Our CEO Artur Jutman will be happy to talk on any topics related to FPGA development, reliability and testing. In particular:
🡲JTAG / boundary-scan / embedded-instrumentation strategies
🡲Flying-probe testing for prototypes and low-volume runs
🡲Functional & production test frameworks, including FPGA-based test firmware
🡲Testability consulting and DFT optimization in early design stages

🎤 Artur will also give a talk titled: "DFT and Test Strategy for High-Performance FPGA Boards: How to make sure your system/PCB design is testable and how to close test coverage gaps where it is needed the most".

🔧 If you build dense, fast, or just plain electronic boards, you know how easily testability can slip through the cracks.

The PCBSYS 2025 conference is organized by Sintecs and hosted by VILNIUS TECH - Vilnius Gediminas Technical University. Many thanks for our good friends Nadzeya Novikava and Pavel Yankovich for invitation and smooth organization of the event!