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Flash Accelerator

Flash Accelerator, a Testonica Lab developed ChipVORX® IP dramatically accelerates In-System Programming (ISP) tasks of flash memories. Flash Accelerator IP is fully integrated into CASCON system from GOEPEL electronic. Contact ChipVORX team at chipvorx[at]testonica.com

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JTAG without Boundaries

We offer advanced JTAG applications and solutions that reduce production costs related to product quality assurance and maintenance. If you need DFT analysis, test strategy or test development, ultra fast flash programming solutions, ask more about our services at bscan[at]testonica.com

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VarioTAP Models

Testonica Lab develops and delivers VarioTAP® models for MPUs and MCUs for Scandinavian customers. The models allow to control on-board processors via JTAG port in order to perform test routines and ISP (Processor Controlled Test or Emulation-based test). Request more information at variotap[at]testonica.com

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Corporate

Testonica Lab is an R&D company acting in the sectors of Information Technologies and Electronics Production. The company paves its path to the success through a continuous invention and innovation process. We look deep into the future seeing upcoming challenges and seeking for economically efficient smart solutions in a tight interaction with our customers.

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News & Events
Testonica is hiring

Testonica offers several job positions related to HW and SW development primarily in two different categories: a) FPGA development using VHDL/Verilog, b) embedded SW development using C language. We are primarily looking for master students, but other candidates are welcome too.

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Testonica delivers embedded Bit-Error Rate Test (BERT) technology

Testonica delivers embedded Bit-Error Rate Test (BERT) technology

The delivered solution enables quality evaluation of up to 10Gbit serial buses (PCIe Gen1/2/3, SATA, optical fiber channel, etc) with a help of powerful FPGA-embedded instrumentation technology. The technology is capable to measure Bit-Error Rate (BER) characteristic for high-speed digital data transmission links as well as to plot so-called BER eye diagram. The latter feature directly fits for mass-production testing since allows every manufactured product to be quickly checked for potential problems on high-speed channels.

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Testonica coordinates just launched FP7 project BASTION

Testonica coordinates just launched FP7 project BASTION

Today, an average family spends over 50 Euros of hidden costs annually on No-Failure-Found (NFF) investigations - a known problem of an unknown origin. Tomorrow, the electronic engine control system in a car will be dying after three-five years of operation due to CMOS aging. Actions are urgently needed!

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ChipVORX® attracts a great attention at Electronica exhibition in Munich

ChipVORX® attracts a great attention at Electronica exhibition in Munich

Artur Jutman, 10th of November, Munich, exhibition grounds. "This is absolutely fantastic" - a typical feedback that I pleasantly hear from respected audience as we are displaying our Flash Accelerator IP and accompanyig software at the GOEPEL booth A1.351.

To be correct, GOEPEL electronic, a Jena, Germany based company is displaying the first ChipVORX® product (an ultra fast flash programmer) that we at Testonica Lab have proudly developed in very tight cooperation with GOEPEL electronic's engineers.

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Embedded ChipVORX® IP Enables Ultra Fast Flash Programming

Embedded ChipVORX® IP Enables Ultra Fast Flash Programming

GOEPEL electronic, world-class vendor of JTAG/Boundary Scan solutions announces the first product based on its new ChipVORX® technology at the International Test Conference (ITC'2010) in Austin, TX, USA. The new ChipVORX® based embedded instrumentation solution, developed in cooperation with the Tallinn/Estonia based Company Testonica Lab within the frame of the GATE alliance, is structured modularly as a set of ChipVORX® models and intelligent IPs.

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Goepel electronic Launches ChipVORX®, a New Embedded Instrumentation Technology

Goepel electronic Launches ChipVORX®, a New Embedded Instrumentation Technology

At the International Test Conference (ITC'2010) in Austin, TX, USA, GOEPEL electronic, world-class vendor of JTAG/Boundary Scan solutions announces the development of a new ChipVORX® technology enabling support of embedded test instrumentation in connection with JTAG/Boundary Scan.

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Partnership Agreement with ASTER Technologies Signed

Testonica Lab has signed a distribution agreement with France/Rennes based company ASTER Technologies. In frames of this agreement Testonica will distribute ASTER products: TestWay and TestWay Express (testability analyzers), QuadView (doc, layout, schematic and virtual schematic viewers, test program quality reports), QUAD (quality adviser), TPQR (Test Program Quality Report), and WildScan (boundary-scan test conversion) on the territory of Baltic states.

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Testonica Intensifies Development of Emulation-Based Test Solutions

In the frames of GOEPEL's GATE™ program Testonica Lab develops processor' models that enable emulation-based test of PCBs.

The set of supported processors for emulation-based board test is now extended by newly delivered model of Freescale i.MX27 processor. i.MX27 is a multimedia applications processor based on ARM926EJ core featuring h.264 D1 hardware codec for high-resolution video processing, an Ethernet 10/100 MAC, security management, plug-and-play connectivity and extended power management.


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Testonica participates in recently launched FP7 project DIAMOND

European Union's 7th Framework Programme's collaborative research project FP7-2009-IST-4-248613 DIAMOND (www.fp7-diamond.eu) - Diagnosis, Error Modelling and Correction for Reliable Systems Design aims at improving the productivity and reliability of semiconductor and electronic systems design in Europe by providing a systematic methodology and an integrated environment for the diagnosis and correction of errors.

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New project with Competence Centre in Electronics-, Info- and Communication Technologies has started

New project with Competence Centre in Electronics-, Info- and Communication Technologies has started

Testonica Lab participates in the project for model based testing and validation of distributed real-time systems initiated by Competence Centre in Electronics-, Info- and Communication Technologies (ELIKO).

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