Testonica is hiring
Testonica offers several job positions related to HW and SW development primarily in two different categories: a) FPGA development using VHDL/Verilog, b) embedded SW development using C language. We are primarily looking for master students, but other candidates are welcome too.
Testonica delivers embedded Bit-Error Rate Test (BERT) technology
The delivered solution enables quality evaluation of up to 10Gbit serial buses (PCIe Gen1/2/3, SATA, optical fiber channel, etc) with a help of powerful FPGA-embedded instrumentation technology. The technology is capable to measure Bit-Error Rate (BER) characteristic for high-speed digital data transmission links as well as to plot so-called BER eye diagram. The latter feature directly fits for mass-production testing since allows every manufactured product to be quickly checked for potential problems on high-speed channels.
Testonica coordinates just launched FP7 project BASTION
Today, an average family spends over 50 Euros of hidden costs annually on No-Failure-Found (NFF) investigations - a known problem of an unknown origin. Tomorrow, the electronic engine control system in a car will be dying after three-five years of operation due to CMOS aging. Actions are urgently needed!